Incorporated herein is a computer program listing microfiche appendix of source code used to control and calibrate electrode position within a semiconductor etching device according to the present invention. Copyright, 1993, Advanced Micro Device, Inc. A portion of the disclosure to this patent document contains material which is subject to copyright protection. The copyright owner has no objection to the facsimile reproduction by anyone of the "microfiche appendix", as it appears in the Patent and Trademark Office file or records, but otherwise reserves all copyright rights whatsoever.
1. Field of the Invention
This invention relates to the manufacture of integrated circuits and more particularly to an integrated circuit etching apparatus including an improved device, system and method for calibrating and controlling the position of electrodes within the etching device.
2. Background of the Relevant Art
It is well known that during integrated circuit manufacturing, whole wafers are coated with a layer or layers of various materials such as silicon dioxide, silicon nitride, or metallization. The unwanted material can be selectively removed by masked photolithography and etchants to leave, for example, holes in a thermal oxide where diffusions are to be made, or long strips of aluminum for electrical interconnect between individual circuit elements. Accordingly, fine-line geometries can be produced by removing or etching select regions of material between the structures.
There are several etching techniques commonly used, including: wet chemical, electrochemical, pure plasma, reactive ion, ion beam milling, sputtering, and high temperature vapor. Wet etching generally involves immersing wafers containing select areas of photoresist in an aqueous etching solution. Wet etching, while the oldest and least expensive technique, is gradually being replaced by dry etching techniques such as plasma etching and combination plasma/reactive ion etching (RIE). Plasma and RIE techniques, often called dry etching, are relatively new and are performed in low pressure gaseous plasma. Dry etching generally involves fewer safety hazards and less spent chemical disposal problems, and also produces finer line geometric structures.
Dry etching generally requires an etching chamber capable of receiving gaseous etchant. The etchant can be pressurized within the chamber and, after etching is completed, the gaseous material and volatile byproducts can be pumped away or evacuated from the chamber. Operating pressure depends upon the material being etched, the gas etchant chosen, and may range from a few torr to fractions of a millitorr. The etching chamber also includes a pair of electrodes at opposing sides or ends of the chamber. One electrode is generally charged by an rf power supply while the other electrode is grounded. Typically, the powered electrode is DC isolated from the RF generator by a capacitor in order that negative electron charge accumulates upon the powered electrode during half the RF cycle while positive ion charge accumulates during the next half cycle. Since electrons are more mobile than ions, a negative potential will build upon the powered electrode in order to charge the electrode negative with respect to the grounded electrode and the gaseous plasma between the electrodes. Depending upon conditions, the voltage differential may be several hundred volts.
Dry etching is achieved by placing one or more wafers upon the powered electrode. The wafer is thereby configured to receive positive ions directed from the plasma toward the negatively charged, powered electrode. The ions are accelerated substantially perpendicular to the wafer surface and embed into the surface. The ions chemically or mechanically react with the surface, and the reactive material is subsequently evacuated from the chamber. The amount of reaction is often referred to as the etch rate.
Etch rate can vary depending upon several factors including: operating pressure within the chamber, wafer temperature, electrode voltage, electrode spacing, inlet gas composition, gas flow rate, etc. Etch rate will therefore increase as the voltage across the electrodes or between the powered electrode and plasma (sheath voltage) increases. Sheath voltage will increase as the gap between electrodes decreases or if the rf voltage upon the powered electrode increases.
Slight changes in the gap or distance between electrodes may substantially change the plasma etch rate. Accordingly, it becomes important to monitor and closely control the gap as well as the electrode positions with respect to one another. It is well known that the electrode material may slightly participate in the etch reaction and therefore become thinner after a number of wafer batches have been processed. After several batches have been completed, the electrodes must be replaced and the new electrodes must be repositioned with the chamber. Furthermore, as the electrodes become thinner, they often must be repositioned so that the gap between electrodes does not become exceedingly large. If the electrodes are not periodically replaced and the gap re-calibrated, the etch rate may become considerably dissimilar from the target rate.
Not only must the gap between electrodes be maintained fairly constant throughout numerous processing batches, but also the gap must be constant across and between the planar surfaces of the electrodes. If the electrodes are not positioned substantially parallel to each other, then a wafer region within the larger gap area may be etched dissimilar from a wafer region within the smaller gap area. Maintaining parallelism and an optimal gap spacing distance is often difficult unless the operator periodically opens the chamber and performs calibration measurement on the electrodes. Frequent opening of the chamber can allow ingress of dust particles and is also time consuming.